Workshop: 6th Workshop on Heterogeneity and Memory Systems (HMEM)
Authors: Xi Wang (University of California, Merced); Jie Ren (William & Mary); and Dong Li (University of California, Merced)
Abstract: Compute eXpress Link (CXL) is emerging as a promising memory interface technology. However, its performance characteristics remain largely unclear due to the limited availability of production hardware. In this work, we study how HPC applications and large language models (LLM) can benefit from the CXL memory, and study the interplay between memory tiering and page interleaving. We also propose a novel data object-level interleaving policy to match the interleaving policy with memory access patterns. Our findings reveal the challenges and opportunities of using CXL.
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